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74F189PC

  • 74F189PC
  • 74F189PC
74F189PC
REGULATOR
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YES
© 1999 Fairchild Semiconductor Corporation DS009493 www.fairchildsemi.com
April 1988
Revised July 1999
74F189 64-Bit Random Access Memory with 3-STATE Outputs
74F189
64-Bit Random Access Memory with 3-STATE Outputs
General Description
The F189 is a high-speed 64-bit RAM organized as a 16-
word by 4-bit array. Address inputs are buffered to mini-
mize loading and are fully decoded on-chip. The outputs
are 3-STATE and are in the high impedance state when-
ever the Chip Select (CS
) input is HIGH. The outputs are
active only in the Read mode and the output data is the
complement of the stored data.
Features
3-STATE outputs for data bus applications
Buffered inputs minimize loading
Address decoding on-chip
Diode clamped inputs minimize ringing
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74F189SC M16B 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74F189SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F189PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
www.fairchildsemi.com 2
74F189
Unit Loading/Fan Out
Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Block Diagram
Pin Names Description
U.L. Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
A
0
–A
3
Address Inputs 1.0/1.0 20 µA/0.6 mA
CS
Chip Select Input (Active LOW) 1.0/1.0 20 µA/1.2 mA
WE
Write Enable Input (Active LOW) 1.0/1.0 20 µA/0.6 mA
D
0
–D
3
Data Inputs 1.0/1.0 20 µA/0.6 mA
O
0
–O
3
Inverted Data Outputs 150/40 (33.3) 3.0 mA/24 mA (20 mA)
Inputs
Operation Condition of Outputs
CS
WE
L L Write High Impedance
L H Read Complement of Stored Data
H X Inhibit High Impedance
3 www.fairchildsemi.com
74F189
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Storage Temperature 65°C to +150°C
Ambient Temperature under Bias 55°C to +125°C
Junction Temperature under Bias 55°C to +175°C
V
CC
Pin Potential to
Ground Pin 0.5V to +7.0V
Input Voltage (Note 2) 0.5V to +7.0V
Input Current (Note 2) 30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
= 0V)
Standard Output 0.5V to V
CC
3-STATE Output 0.5V to +5.5V
Current Applied to Output
in LOW State (Max)
Free Air Ambient Temperature 0°C to +70°C
Supply Voltage +4.5V to +5.5V
Symbol Parameter Min Typ Max Units
V
CC
Conditions
V
IH
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage 1.2 V Min I
IN
= 18 mA
V
OH
Output HIGH 10% V
CC
2.5
VMin
I
OH
= 1 mA
Voltage 10% V
CC
2.4 I
OH
= 3 mA
5% V
CC
2.7 I
OH
= 1 mA
5% V
CC
2.7 I
OH
= 3 mA
V
OL
Output LOW
Voltage 10% V
CC
0.5 V Min I
OL
= 24 mA
I
IH
Input HIGH
Current 5.0 µAMaxV
IN
= 2.7V
I
BVI
Input HIGH Current
Breakdown Test 7.0 µAMaxV
IN
= 7.0V
I
CEX
Output HIGH
Leakage Current 50 µAMaxV
OUT
= V
CC
V
ID
Input Leakage 4.75 V 0.0 I
ID
= 1.9 µA
Test All Other Pins Grounded
I
OD
Output Leakage 3.75 µA0.0V
IOD
= 150 mV
Circuit Current All Other Pins Grounded
I
IL
Input LOW Current 0.6 mA Max V
IN
= 0.5V (except CS)
1.2 V
IN
= 0.5V (CS)
I
OZH
Output Leakage Current 50 µAMaxV
OUT
= 2.7V
I
OZL
Output Leakage Current 50 µAMaxV
OUT
= 0.5V
I
OS
Output Short-Circuit Current 60 150 mA Max V
OUT
= 0V
I
ZZ
Bus Drainage Test 500 µA0.0VV
OUT
= 5.25V
I
CCZ
Power Supply Current 37 55 mA Max V
O
= HIGH Z

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