24C04A, 24C08A, 24C16A
© 2009 Fremont Micro Devices Inc. DS3001M-page1
Two-Wire Serial EEPROM
4K, 8K and 16K (8-bit wide)
FEATURES
Low voltage and low power operations:
FT24C04A/08A/16A: V
CC
= 1.8V to 5.5V
Maximum Standby current < 1µA (typically 0.02µA and 0.06µA @ 1.8V and 5.5V respectively).
16 bytes page write mode.
Partial page write operation allowed.
Internally organized: 512 8 (4K), 1024 8 (8K), 2048 8 (16K).
Standard 2-wire bi-directional serial interface.
Schmitt trigger, filtered inputs for noise protection.
Self-timed Write Cycle (5ms maximum).
1 MHz (5V), 400 kHz (1.8V, 2.5V, 2.7V) Compatibility.
Automatic erase before write operation.
Write protect pin for hardware data protection.
High reliability: typically 1, 000,000 cycles endurance.
100 years data retention.
Industrial temperature range (-40
o
C to 85
o
C).
Standard 8-pin DIP/SOP/TSSOP/DFN/MSOP and 5-pin SOT-23/TSOT-23 Pb-free packages.
DESCRIPTION
The FT24C04A/08A/16A series are 4096/8192/16384 bits of serial Electrical Erasable and Programmable Read Only
Memory, commonly known as EEPROM. They are organized as 512/1024/2048 words of 8 bits (1 byte) each. The
devices are fabricated with proprietary advanced CMOS process for low power and low voltage applications. These
devices are available in standard 8-lead DIP, 8-lead SOP, 8-lead TSSOP, 8-lead DFN, 8-lead MSOP, and 5-lead SOT-
23/TSOT-23 packages. A standard 2-wire serial interface is used to address all read and write functions. Our
extended V
CC
range (1.8V to 5.5V) devices enables wide spectrum of applications.
PIN CONFIGURATION
Pin Name Pin Function
A2, A1, A0 Device Address Inputs
SDA Serial Data Input / Open Drain Output
SCL Serial Clock Input
WP Write Protect
NC No-Connect
24C04A, 24C08A, 24C16A
DS3001M-page2 © 2009 Fremont Micro Devices Inc.
All these packaging types come in conventional or Pb-free certified.
VCC
WP
SCL
SDA
A2
A1
A0
GND
FT24C04A/08A/16A
1
2
3
4
8
7
6
5
8L DIP
8L SOP
8L TSSOP
SDA
WP
VCC
GND
FT24C04A/08A/16A
2
15
4
SOT-23-5
SCL
3
8L DFN
8L MSOP
TSOT-23-5
ABSOLUTE MAXIMUM RATINGS
Industrial operating temperature: -40
o
C to 85
o
C
Storage temperature: -50
o
C to 125
o
C
Input voltage on any pin relative to ground: -0.3V to V
CC
+ 0.3V
Maximum voltage: 8V
ESD protection on all pins: >2000V
* Stresses exceed those listed under “Absolute Maximum Rating” may cause permanent damage to the device.
Functional operation of the device at conditions beyond those listed in the specification is not guaranteed. Prolonged
exposure to extreme conditions may affect device reliability or functionality.
24C04A, 24C08A, 24C16A
© 2009 Fremont Micro Devices Inc. DS3001M-page3
PIN DESCRIPTIONS
(A) SERIAL CLOCK (SCL)
The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of this clock is to
clock data out of the EEPROM device.
(B) DEVICE / CHIP SELECT ADDRESSES (A2, A1, A0)
These are the chip select input signals for the serial EEPROM devices. Typically, these signals are hardwired to
either V
IH
or V
IL
. If left unconnected, they are internally recognized as V
IL
. FT24C04A has A0 pin as no-connect.
FT24C08A has both A0 and A1 pins as no-connect. For FT24C16A, all device address pins (A0-A2) are no-
connect.
(C) SERIAL DATA LINE (SDA)
SDA data line is a bi-directional signal for the serial devices. It is an open drain output signal and can be wired-
OR with other open-drain output devices.
(D) WRITE PROTECT (WP)
The FT24C04A/08A/16A devices have a WP pin to protect the whole EEPROM array from programming.
Programming operations are allowed if WP pin is left un-connected or input to V
IL
. Conversely all programming
functions are disabled if WP pin is connected to V
IH
or V
CC
. Read operations is not affected by the WP pin’s input
level.
Table A
Device
Chip Select/Device
Address Pins Used
No-Connect Pins
Max number of similar
devices on the same bus
FT24C04A A2, A1 A0 4
FT24C08A A2, A1, A0 2
FT24C16A (None) A2, A1, A0 1
MEMORY ORGANIZATION
The FT24C04A/08A/16A devices have 32/64/128 pages respectively. Since each page has 16 bytes, random word
addressing to FT24C04A/08A/16A will require 9/10/11 bits data word addresses respectively.
DEVICE OPERATION
(A) SERIAL CLOCK AND DATA TRANSITIONS
The SDA pin is typically pulled to high by an external resistor. Data is allowed to change only when Serial clock
SCL is at V
IL
. Any SDA signal transition may interpret as either a START or STOP condition as described below.
(B) START CONDITION
With SCL V
IH
, a SDA transition from high to low is interpreted as a START condition. All valid commands
must begin with a START condition.
